The present paper presents a methodology and electronic analysis in PSPICE for a CD/CD converter with power factor correction (PFC); it is presenting the comparation between the simulated and experimental results. A SEPIC topology is used but with a modification with respects the common configuration in which the second inductor is built as a self transformer with a higher voltage between the external ends an a lower voltage at the middle of the inductor. Beside that the circuit includes an integrated circuit for correcting the power factor, the MC33262. The entire system was simulated and later it was probed in the laboratory where it seems to be working properly.
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